| OID | 1.3.6.1.2.1.10.18.6.1.6 |
| Module | DS1-MIB (CISCO) |
| Nom | dsx1LineCoding |
| Acces | readwrite |
| Status | current |
| Description | This variable describes the variety of Zero Code
Suppression used on this interface, which in turn
affects a number of its characteristics.
dsx1JBZS refers the Jammed Bit Zero Suppression,
in which the AT&T specification of at least one
pulse every 8 bit periods is literally implemented
by forcing a pulse in bit 8 of each channel.
Thus, only seven bits per channel, or 1.344 Mbps,
is available for data.
dsx1B8ZS refers to the use of a specified pattern
of normal bits and bipolar violations which are
used to replace a sequence of eight zero bits.
ANSI Clear Channels may use dsx1ZBTSI, or Zero
Byte Time Slot Interchange.
E1 links, with or without CRC, use dsx1HDB3 or
dsx1AMI.
dsx1AMI refers to a mode wherein no zero code
suppression is present and the line encoding does
not solve the problem directly. In this
application, the higher layer must provide data
which meets or exceeds the pulse density
requirements, such as inverting HDLC data.
dsx1B6ZS refers to the user of a specifed pattern
of normal bits and bipolar violations which are
used to replace a sequence of six zero bits. Used
for DS2. |
| Syntaxe | Enumeration (1-dsx1JBZS, 2-dsx1B8ZS, 3-dsx1HDB3, 4-dsx1ZBTSI, 5-dsx1AMI, 6-other, 7-dsx1B6ZS) |
| Module | DS1-MIB (ietf) |
| Nom | dsx1LineCoding |
| Acces | readwrite |
| Status | current |
| Description | This variable describes the variety of Zero Code
Suppression used on this interface, which in turn
affects a number of its characteristics.
dsx1JBZS refers the Jammed Bit Zero Suppression,
in which the AT&T specification of at least one
pulse every 8-bit period is literally implemented
by forcing a pulse in bit 8 of each channel.
Thus, only 7 bits per channel, or 1.344 Mbps,
are available for data.
dsx1B8ZS refers to the use of a specified pattern
of normal bits and bipolar violations that are
used to replace a sequence of 8 zero bits.
ANSI Clear Channels may use dsx1ZBTSI, or Zero
Byte Time Slot Interchange.
E1 links, with or without CRC, use dsx1HDB3 or
dsx1AMI.
dsx1AMI refers to a mode wherein no Zero Code
Suppression is present and the line encoding does
not solve the problem directly. In this
application, the higher layer must provide data
that meets or exceeds the pulse density
requirements, such as inverting HDLC data.
dsx1B6ZS refers to the user of a specified pattern
of normal bits and bipolar violations that are
used to replace a sequence of 6 zero bits. Used
for DS2.
For more information about line coding see
[ANSI-T1.102] |
| Syntaxe | Enumeration (1-dsx1JBZS, 2-dsx1B8ZS, 3-dsx1HDB3, 4-dsx1ZBTSI, 5-dsx1AMI, 6-other, 7-dsx1B6ZS) |