MIB Discovery
1930 modules enregistrés
Chemin
MIX : 1 (iso). 3 (org). 6 (dod). 1 (internet). 4 (private). 1 (enterprises). 1570 (ciscoTelesend). 1 (frMux). 6 (frxPort). 4 (frxUThrTable). 1 (frxUThrEntry). 7 (frxThCond)
OID : 1.3.6.1.4.1.1570.1.6.4.1.7
TXT : iso. org. dod. internet. private. enterprises. ciscoTelesend. frMux. frxPort. frxUThrTable. frxUThrEntry. frxThCond
Enfants
Pas d'enfants disponibles pour cet OID
Détails
OID1.3.6.1.4.1.1570.1.6.4.1.7
Module Cisco90Series-MIB (CISCO)
NomfrxThCond
Accesreadwrite
Statusmandatory
Description 8-bit Threshold Condition register. One bit for each threshold in both directions. Set to 1 if the threshold is exceeded and the corresponding bit in the frxAlertMask register is set to 0. Only set to 0 by the SNMP manager. 1 Current Day Severely Errored Seconds Receive 2 Current Day Severely Errored Seconds Transmit 4 Current Day Errored Seconds Receive 8 Current Day Errored Seconds Receive 16 Current Hour Severely Errored Seconds Receive 32 Current Hour Severely Errored Seconds Transmit 64 Current Hour Errored Seconds Receive 128 Current Hour Errored Seconds Transmit Receive is data from the customer towards the network. Transmit is data from the network towards the Customer. SNMP manager should reset bits to 0 after they it has been read by issuing a set using the inverted byte read. Sets will only reset bits where the set data is a 0. Setting a bit to a 1 has no effect. This register is defined by Bellcore TR-TSY-000829. In the spirit of SNMP, the bits are inverted when read relative to that specification so the sense of the bits is the same for sets and gets. Indexed by Bank.ChannelUnit.Port.Address
SyntaxeInteger32 (0...255)